Projectagon-Based Reachability Analysis for Circuit-Level Formal Verification

This dissertation presents a novel verification technique for analog and mixed sig-nal circuits. Analog circuits are widely used in many applications include con-sumer electronics, telecommunications, medical electronics. Furthermore, in deepsub-micron design, physical effects might undermine common digital abstractionsof circuit behavior. Therefore, it is necessary to develop systematic methodologiesto formally verify hardware design using circuit-level models.We present a formal method for circuit-level verification. Our approach isbased on translating verification problems to reachability analysis problems. Itapplies nonlinear ODEs to model circuit dynamics using modified nodal analysis.Forward reachable regions are computed from given initial states to explore allpossible circuit behaviors. Analog properties are checked on all circuit states toensure full correctness or find a design flaw. Our specification language extendsLTL logic with continuous time and values and applies Brockett’s annuli to spec-ify analog signals. We also introduced probability into the specification to supportpractical analog properties such as metastability behavior.We developed and implemented a reachability analysis tool COHO for a sim-ple class of moderate-dimensional hybrid systems with nonlinear ODE dynamics.COHO employs projectagons to represent and manipulate moderate-dimensional,non-convex reachable regions. COHO solves nonlinear ODEs by conservativelyapproximating ODEs as linear differential inclusions. COHO is robust and effi-cient. It uses arbitrary precision rational numbers to implement exact computationand trims projectagons to remove infeasible regions. To improve performance andreduce error, several techniques are developed, including a guess-verify strategy,hybrid computation, approximate algorithms, and so on.